FET Biasing Methods: Fixed Bias, Voltage-Divider Bias, Self Bias

This article introduces different biasing methods for JFETs and MOSFETs. Key focus areas include fixed biasing, voltage-divider biasing, and self-biasing techniques.

In the study of bipolar transistor amplifiers, the primary function of an amplifier is to reproduce an applied signal and provide some level of amplification. Unipolar transistors can also be used to achieve this function. JFETs and MOSFETs are examples of unipolar amplifying devices. Amplification using unipolar transistors depends on the FET device used and its circuit components, just like it does with bipolar transistor amplifiers.

The composite circuit of an FET amplifier is normally energized by a DC voltage source. An AC signal is then applied to the input of the FET amplifier. After passing through the FET, an amplified version of the signal appears at the output. Operating conditions of the FET and the circuit combine to determine the level of amplification achieved.

FET amplifiers are used in several types of electronic circuits. FETs are voltage-controlled devices that have high gain, low power dissipation in the gate circuit, and a high input impedance. These features enable an FET to function effectively as an amplifier.

Overview of FET Biasing Methods

For an FET operation, biasing refers to the necessary DC voltage needed by the gate with respect to the source lead, that is, the development of a suitable $V_{GS}$ value. By selecting a proper bias voltage, it becomes possible to force a device to operate at a chosen Q point. The $V_{DD}$ voltage applied to the source drain is generally not considered to be a bias voltage. The biasing method selected for a specific circuit depends on the type of device involved. For example, E-MOSFETs and D-MOSFETs require different biasing procedures. This article looks at biasing methods for all FETs.

Fixed Biasing

The simplest way to bias an FET is with fixed biasing. This method of biasing can be used equally well for JFETs, D-MOSFETs, or E-MOSFETs. In fixed biasing, the correct voltage value and polarity is supplied by a small battery or cell. An electronic power supply could also be used to perform the same operation.

Figure 1 shows fixed biasing applied to three different N-channel FET types. If P-channel devices were used, the polarity of $V_{GG}$ and $V_{DD}$ would be reversed. $V_{GG}$ is used as the fixed bias source for the three FET types.

fixed biasing. (a) N-channel JFET. (b) N-channel D-MOSFET. (c) N-channel E-MOSFET.

Figure 1. Fixed biasing. (a) N-channel JFET. (b) N-channel D-MOSFET. (c) N-channel E-MOSFET.

JFET Fixed Biasing

Biasing of a JFET circuit is very similar to a bipolar junction transistor (BJT). The circuits of Figure 1(a) show fixed biasing of an N-channel JFET. Note the polarity of the $V_{GG}$ and $V_{DD}$ power sources.

Example 1

Refer to Figure 1(a). Assume that $V_{GG} = 5V$, $I_{D} = 10mA$, $V_{DD} = 12V$, and $R_{L} = 1k\Omega$. Calculate $V_{RL}$ and $V_{DS}$ for the N-channel FET circuit.

Solution

$$V_{RL} = I_{D} \times R_{L} = 10mA \times 1k\Omega = 10V $$

$$V_{DS} = V_{DD} – V_{RL} = 12V – 10V = 2V $$

D-MOSFET Fixed Biasing

D-MOSFET fixed biasing, shown in Figure 2, is similar to JFETs. In this type of device, the operating point is often $V_{GS} = 0V$ and is referred to as zero bias. No voltage source is needed to establish the operating point. $R_{g}$ is normally of a very high value. Typically, values of 1–10M$\Omega$ are used. $R_{g}$ must be included in the circuit. It serves as a return path from the gate to the common connection point.

Fixed biasing of an N-channel D-MOSFET.

Figure 2. Fixed biasing of an N-channel D-MOSFET.

D-MOSFET circuits are very similar to JFET circuits in terms of biasing. All of the circuit relationships for JFET circuits remain the same for D-MOSFETs.

E-MOSFET Biasing

Enhancement-mode operation requires a positive value of $V_{GS}$. Voltage divider bias is typically used for E-MOSFET circuits. Figure 3(a) shows an N-channel MOSFET, and Figure 3(b) shows a P-channel MOSFET.

Voltage-divider biasing for E-MOSFETs. (a) N-channel. (b) P-channel.

Figure 3. Voltage-divider biasing method for E-MOSFETs. (a) N-channel. (b) P-channel.

Voltage-Divider Biasing

Voltage-divider biasing of FETs is rather easy to achieve. It is applicable only to E-MOSFETs. With these devices, $V_{GS}$ and $V_{DD}$ are of the same polarity. As a result of this condition, a single voltage source can be used as a supply. The $V_{GS}$ voltage is only a fraction of the value of $V_{DD}$. The divider resistors are used to develop the necessary voltage values. Figure 3 shows the divider method of biasing for N-channel and P-channel E-MOSFETs.
The values of $R_{1}$ and $R_{g}$ must be properly chosen to establish a desired operating point. By the voltage-divider equation, we find that the bias voltage is:

$$V_{GS} = V_{Rg} = V_{G} = V_{DD} \times \frac{R_{2}}{R_{1} + R_{2}} $$

Example 2

Refer to Figure 3(a). Assume that $\quad R_{1} = 1M\Omega$, $R_{2} = 1M\Omega$, $\quad V_{DD} = 24V$, $\quad R_{L} = 1k\Omega, \quad$ and $\quad I_{D} = 5mA$. $\quad$ Calculate $\quad V_{G}\quad and \quad V_{RL}$.

Solution

$$V_{G} = V_{DD} \times \frac{R_{2}}{R_{1} + R_{2}} = 24V \times \frac{1M\Omega}{1M\Omega + 1M\Omega} = 12V $$

$$V_{RL} = I_{D} \times R_{L} = 5mA \times 1k\Omega = 5V $$

Self-Biasing

Self-biasing is commonly called source biasing. Self-biasing is rather easy to recognize. The source current of an FET is used to develop the bias voltage. The voltage developed is achieved by a resistor ($R_{S}$) connected in series with the source. Current flow through the source−drain causes a voltage drop across $R_{S}$. The polarity of the developed voltage is based on the direction of current flow through $R_{S}$. Figure 4 shows biasing for N-channel and P-channel JFETs using self-biasing.

Self-biasing of JFETs. (a) N-channel. (b) P-channel.

Figure 4. Self-biasing of JFETs. (a) N-channel. (b) P-channel.

For the N-channel circuit, current flow through $R_{S}$ causes the source to be slightly positive with respect to the gate. With $R_{g}$ connected to the lower side of $R_{S}$, $R_{g}$ is negative and the source positive. This value of $R_{S}$ and drain current ($I_{D}$) determines the bias operating point of the circuit. Note the polarity difference in the P-channel circuit of Figure 4(b).

Review Questions

  1. In fixed biasing of a MOSFET, voltage is supplied to the _____ by a battery or DC power supply.
  2. The voltage-divider method of biasing applies only to _____ devices.
  3. Self-biasing uses the current through the _____ resistor to develop $V_{GS}$.
  4. In enhancement-mode MOSFETs, a _____ $V_{GS}$ is required for operation.
  5. The return path from gate to common in D-MOSFET biasing is provided by the _____ resistor.

Answers

  1. gate
  2. depletion
  3. source
  4. positive
  5. gate

Key Takeaway

Understanding FET biasing methods—such as fixed biasing, self-biasing, and voltage-divider biasing—is essential for designing stable and efficient analog circuits using JFETs, D-MOSFETs, and E-MOSFETs. These biasing methods directly influence the operating point, signal amplification, and overall circuit behavior, which are critical for applications in signal processing, RF design, and low-power electronic systems.