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Transistor as an Amplifier | Theory | Working Principle

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A transistor can amplify the current or voltage of a signal. Amplifying current implies that the transistor output current is higher than its input current. Amplifying voltage implies that the voltage variation of the output is higher than the voltage variation of the input.

When putting together, a number of transistors can serve as a power amplifier (amplifying both voltage and current). For instance, a very weak electromagnetic signal received by the antenna of a radio has little voltage and cannot cause any significant current in a circuit. It must be amplified by hundreds of times in order to be audible through a loudspeaker.

Similarly, a weak signal picked up by a sensor in many industrial applications, is amplified before it can be used for further processing.

Voltage Amplification Example

The circuit in Figure 1 illustrates a simple example of how the voltage of a simple sinusoidal signal can be amplified. In other words, if a sinusoidal signal is introduced as the input of a transistor, the transistor output is a similar signal (having the same form and frequency) with a higher voltage. We study the variation of the voltage across the load and compare it with the input voltage.

Example of voltage amplification by a transistor.

Figure 1 Example of voltage amplification by a transistor.

The input is a sinusoidal voltage with a peak-to-peak value of 2 V introduced at point K, which is connected to the transistor base through a 470 kΩ resistor. The other wire for this signal is connected to the ground.

The role of the capacitor before point K is very important. It filters (prevents from passing) any DC content that may be blended with the input signal.

The corresponding values for the input (the sinusoidal waveform) and the output (voltage across the load) for each 30° of the one cycle are entered in Table 1, together with some other values, as discussed.

TABLE 1 Variation of Input versus Output Voltage for the Circuit of Figure 1

Assuming that this transistor is made out of silicon because in a silicon base transistor there is always a voltage drop of about 0.7 V between the base and the emitter, the voltage at K must be such that it never goes below 0.7 V. Otherwise, the transistor goes to cutoff state and stops conducting.

In this example, the 13.7 kΩ and 1000 Ω resistors form a voltage divider to provide 1.7 V DC at point K. This value of 1.7 V has been specifically selected such that for the most negative value of the sinusoidal wave the base-emitter junction is still forward biased and its VBE is not less than 0.7 V (1.7 − 1/2 × 2) = 0.7 V; the input is 2 V peak to peak.

The 2 V peak-to-peak value AC signal and the 1.7 V DC signal add together and, as a result, the voltage at point K has a variation between 2.7 and 0.7 V.

Table 1 shows the following values for 12 different points (360° at 30° intervals):

  1. Input signal angle at various instants during one cycle.
  2. Input signal voltage.
  3. The voltage at point K.
  4. VBE(Voltage at K − 0.7 V).
  5. Base current, in microampere (μA), based on Ohm’s law VBE/470 kΩ.
  6. Collector current in mA, assuming 100× the base current (IC = βIB= 100IB).
  7. Voltage drop in resistor R (see Figure 1).
  8. The voltage at point L. This is VCE, because the emitter is grounded, VCE= 25 V – voltage drop in the 5.6 kΩ resistors.

Notice that here we have intentionally connected the load across the 5.6 kΩ resistors. The variation of the voltage across the load is sinusoidal, that is, similar to the input. Although this way of connecting the load is possible, it is not the only way to do so.

The load could be connected between the ground and point L. For this configuration, both the output voltage and the voltage across the load have sinusoidal forms, but the two voltages have a 180° phase difference.

Figure 2 shows the relationship between the voltages of the input and output signals (rows 2 and 8 of Table 1). There are a number of important points that can be observed from Figures 1 and 2:

  1. The transistor is used in a common-emitter configuration.
  2. The input signal has a sinusoidal waveform.
  3. The input signal was blended with a positive DC value to create a varying DC (varying in value, but otherwise always positive) signal.
  4. The output is also always positive, but it has a variation in the form of a sinusoidal wave.
  5. The output variation (sinusoidal pattern) has the same frequency as the input.
  6. The peak to peak of the output voltage variation has a larger value than that of the input signal.
  7. When the input signal is at its maximum, the output signal is at its minimum, and vice versa. That is, the output is 180° out of phase with the input.

Input and output relationship in a transistor when used in common emitter design

Figure 2 Input and output relationship in a transistor when used in common emitter design.

In the same way that the input signal was blended with a constant DC voltage, the output signal has a DC content, as seen in Figure 2.

To remove the DC content of the output signal, a capacitor is added to the circuit at a point where the output signal is taken (point L).

The revised circuit is as shown in Figure 3. This capacitor of appropriate value can filter out the DC content (block the DC current). The outcome of this filtration is a signal that varies between −11.9 and +11.9 V, $\left( \frac{25-1.2}{2} \right)$, that is, its peak-to-peak value is about 23.8 V. Figure 4 depicts the voltages at points H, K, L, and M of the circuit in Figure 3; the ratio of amplification, however, is shown smaller in order fit the page.

The input signal is introduced between point H and the ground, and the output signal is taken between point M and the ground. The sinusoidal input signal was amplified by 11.9× (the ratio between the peak value of the output and the peak value of the input).

Figure 3 Capacitor C2 is added to the circuit in Figure 2.

Figure 4 Voltage forms at various points of the circuit in Figure 3.

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About Ahmad Faizan

Mr. Ahmed Faizan Sheikh, M.Sc. (USA), Research Fellow (USA), a member of IEEE & CIGRE, is a Fulbright Alumnus and earned his Master’s Degree in Electrical and Power Engineering from Kansas State University, USA.